Nvidia is opening its rack-scale AI infrastructure to third-party silicon, positioning NVLink Fusion as the on-ramp that lets hyperscalers and AI-native companies wire their own custom XPUs into the same architecture that powers GB300 NVL72 and the upcoming Vera Rubin NVL72. The interconnect extends the sixth-generation NVLink scale-up domain to 72 accelerators, and Nvidia claims it delivers 3x lower end-to-end latency for XPU-to-XPU transfers than Ethernet-based alternatives, with a packet rate 10x higher. The pitch, laid out in an Nvidia blog post on August 24, is that custom chip teams can concentrate innovation on the accelerator while inheriting a validated rack, network and manufacturing stack.
The economics of an AI factory now hinge on tokens per second, tokens per watt and cost per token, and Nvidia's argument is that scale-up fabric is where those metrics live or die. For trillion-parameter models, mixture-of-experts routing and agentic workloads, a slow interconnect drops utilization and raises cost per token. NVLink Fusion also includes NVLink-C2C for linking XPUs to Nvidia Vera CPUs or partner CPUs, which Nvidia says delivers up to 6x the energy efficiency of a PCIe interface.
The roadmap goes further. Future NVLink configurations will support domains of up to 1,152 accelerators, paired with co-packaged optics. That scale is the ceiling Nvidia is dangling in front of custom-silicon teams at Intel, MediaTek, GUC and Amazon's Annapurna Labs, all of whom lined up with quotes in the launch post.
Key facts
- 01NVLink Fusion connects custom XPUs across a 72-accelerator scale-up domain with 3x lower XPU-to-XPU latency than off-the-shelf Ethernet.
- 02The interconnect delivers a 10x higher packet rate than Ethernet-based alternatives, targeting trillion-parameter and mixture-of-experts workloads.
- 03NVLink-C2C links XPUs to Nvidia Vera CPUs at up to 6x the energy efficiency of a PCIe interface.
- 04Future NVLink roadmap configurations scale to 1,152 accelerators per domain with co-packaged optics.
- 05QCT says Vera Rubin NVL72 builds run at nearly 100% manufacturing-line automation, and Fusion adopters inherit that supply chain.
Intel's endorsement is notable given the two companies' longstanding rivalry in the data center. The company is signaling it wants its CPUs paired with Nvidia rack infrastructure regardless of what accelerator sits next to them.
“NVLink Fusion gives customers the ability to choose the CPU architecture, the performance level, the software capabilities that best meet their needs for the workloads that they care about.”— Tim Wilson, Intel vice president and general manager of data center silicon engineering
Nvidia is also leaning on the MGX rack architecture and its supply chain to shorten the runway from silicon to deployment. QCT's Jack Luoh said Vera Rubin NVL72 systems are targeting nearly 100% automation on the manufacturing line, and that Fusion adopters can leverage those same investments rather than standing up parallel factory tooling. MGX suppliers handle rack, cooling, power delivery and emerging 800 VDC designs.
For MediaTek, the sell is decoupling. Custom XPU roadmaps rarely align with GPU roadmaps, and buyers routinely find themselves waiting on one or the other.
“The value of the NVLink Fusion program is … [customers] can deploy their rack-level solution with the NVIDIA GPU, and then they can decouple the development of their XPU and put it at a different pace.”— Vince Hu, MediaTek corporate senior vice president and general manager of data center and computing business group
Serviceability is part of the pitch. Reference compute trays use 100% liquid cooling with no fans, cables or hoses, and can be pulled while the rest of the rack keeps running. NVLink Switch trays are liquid cooled as well and support continued operation during service — a meaningful detail for operators whose uptime targets don't tolerate rack-wide maintenance windows.
Annapurna Labs, the Amazon silicon group behind Trainium and Inferentia, framed Fusion as a time-to-market lever.
“With NVLink Fusion we can use proven NVL72 rack design to have time-to-market, and we can have access to multiple suppliers to help us to deliver more into the hands of our customers.”— CC Lee, Annapurna Labs senior hardware development manager
The software layer is Nvidia's. NCCL handles distributed workloads, Dynamo and NIXL manage disaggregation, and Mission Control provides cluster telemetry and debugging. Together with the DSX reference architecture and the Omniverse DSX AI Factory Blueprint — a digital twin for gigawatt-scale facilities — Nvidia is packaging the full stack from building design down to inter-chip traffic.
The counterweight is lock-in. NVLink Fusion is an open door with Nvidia's name on the hinges: partners plug in their XPUs, but the fabric, the rack, the switch, the CPU option, the cluster software and the digital-twin planning tool are all Nvidia's. Custom silicon buys optionality on the accelerator, but the surrounding infrastructure becomes harder to swap out with each layer of integration. Groq's 3 LPX, referenced in Nvidia's own recent-news feed, is a reminder that entirely separate scale-up architectures do exist — they just don't inherit NVL72's supply chain.
For Nvidia, Fusion is a defensive move dressed as an opening. Hyperscalers building custom silicon — AWS, Google, Meta, Microsoft — are the single biggest threat to Nvidia's data-center revenue. By offering the rack, the fabric and the factory blueprint as the neutral substrate, Nvidia converts a competitive dynamic into a complementary one, and keeps its stack in the room even when the accelerator carries someone else's name. Expect the 1,152-accelerator domain and NVIDIA GTC Berlin in October to be where the next round of Fusion adopters get announced.
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