XCENA, a four-year-old chip startup with offices in South Korea and Sunnyvale, raised $135M in a Series B at a $570M valuation to build silicon that treats memory, not compute, as the binding constraint on AI inference. The round brings total funding to $185M and is co-led by Seoul-based Altinum and IMM Investment, with Corstone Asia, SBI Investment, and Mirae Asset Capital participating. XCENA's pitch is that every ChatGPT request triggers a wasteful relay between DRAM, CPU, and GPU — and that putting compute next to memory can collapse the cost.
The company's first chip, the MX1, connects to a host CPU over CXL (Compute Express Link) and handles data orchestration directly inside the memory module. XCENA claims workloads that today require 10 servers could run on a single server using its architecture — a figure that, if it survives contact with hyperscaler benchmarks, would meaningfully reshape inference economics. Mass production is scheduled at Samsung's foundry by end of 2026, with revenue expected to begin in 2027.
CEO Jin Kim founded XCENA in 2022 with CTO Dohun Kim and CPO Harry Juhyun Kim, all alumni of Samsung and SK Hynix — the memory giants that supply the HBM stacks inside Nvidia's GPUs. The founding thesis is that processor architecture has advanced for decades while DRAM has effectively stood still.
“CPUs and GPUs have both gotten smarter over the decades. Memory never did. XCENA wants to change that.”— Jin Kim, XCENA CEO
Key facts
- 01XCENA raised $135M in Series B at a $570M valuation, bringing total funding to $185M.
- 02The MX1 chip connects to CPUs via CXL and handles preprocessing, KV cache, and data caching inside the memory module.
- 03XCENA claims workloads that today need 10 servers could run on 1 using its architecture.
- 04Mass production at Samsung's foundry is scheduled for end of 2026, with revenue expected in 2027.
- 05Samsung, SK Hynix, and Micron each crossed $1 trillion valuations this month as memory demand surged.
The macro tailwind is hard to argue with. Samsung, SK Hynix, and Micron — the three companies that dominate the global memory market — each crossed $1 trillion in market value for the first time this month, a re-rating driven by AI inference demand that began surging in the second half of last year. Kim frames the shift as structural: inference, he argues, is increasingly a memory scaling problem rather than a compute problem.
Technically, the MX1 targets the work GPUs are bad at. Matrix multiplication — the heavy math of model training and the forward pass — stays on the accelerator. But the surrounding orchestration (preprocessing, KV cache management for conversation context, and data caching) currently bounces back to CPUs and main memory. XCENA's chip executes those steps inside the memory module itself, cutting the round trips.
The ideal customer set is narrow but lucrative: hyperscalers spending tens of billions a year on AI infrastructure, where a single-digit efficiency gain compounds into hundreds of millions in annual savings. Kim said conversations with several global memory vendors are underway but declined to name them.
XCENA's closest public-market comparables are Astera Labs and Marvell, both Nasdaq-listed and both building next-generation memory connectivity. Kim's pitch against Marvell is intellectual property density.
“We have thousands of cores.”— Jin Kim, XCENA CEO
By his account, Marvell's approach relies on a handful of general-purpose cores, while XCENA's MX1 packs thousands of small, RISC-V-based cores tuned specifically for data processing. The company also designs its own internal memory hierarchy, interconnect bus, and DRAM controller — vertical integration that most chip startups outsource. Headcount sits above 90 across the Pangyo and Sunnyvale offices, with additional international fundraising conversations in progress.
The skeptical read is that XCENA is selling a prototype, not a product. The MX1 will not ship in volume until late 2026, and competing with Marvell and Astera Labs in a category dominated by long hyperscaler qualification cycles is unforgiving. CXL adoption itself has moved slower than early projections, and the NPU vendors chasing Nvidia on the training side are far better capitalized. A $570M valuation on a pre-revenue chip company assumes execution that the team — however senior its Samsung and SK Hynix pedigree — still has to prove.
For the broader AI market, XCENA's raise is one more data point that capital is flowing past the GPU layer into the parts of the stack that determine real inference cost. Anthropic's $36B debt deal with Apollo and Blackstone, which AI Chat Daily covered earlier this month, was about training capacity; XCENA is about the unit economics of serving the models once they exist. If memory-centric architectures land at hyperscalers in 2027 on the timeline the company is forecasting, the chips that sit between DRAM and the accelerator may turn out to be a more interesting investment lane than another round of NPU contenders trying to dent Nvidia head-on.
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